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Delay-error-constrained minimax design of all-pass variable-fractional-delay digital filters

机译:全通可变分数延迟数字滤波器的受时延误差约束的极小极大设计

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This paper first derives a simplified variable-fractional-delay (VFD) expression for the all-pass (AP) VFD digital filter, and then uses the simplified VFD expression to formulate the minimax AP-VFD filter design as a two-step linear-programming (LP) problem. To suppress the maximum error of the VFD response (VFD-peak-error), this minimax design minimizes the maximum error of the variable-frequency-response (VFR) subject to the VFD-peak-error constraint. Thus, this two-step design can minimize the VFR-peak-error with the VFD-peak-error suppressed below a prescribed upper bound. With the aid of the simplified VFD expression, the VFD-peak-error constraint can be approximately linearized as a linear one, and thus the minimax design can be solved by using the LP method. We will use an illustrative example to verify that the simplified VFD expression is almost the same as the true one, and that the proposed LP-based two-step minimax design can significantly suppress the VFD-peak-error.
机译:本文首先针对全通(AP)VFD数字滤波器推导了简化的可变分数延迟(VFD)表达式,然后使用简化的VFD表达式将minimax AP-VFD滤波器设计公式化为两步线性滤波。编程(LP)问题。为了抑制VFD响应的最大误差(VFD峰值误差),该minimax设计将受VFD峰值误差约束的可变频率响应(VFR)的最大误差最小化。因此,该两步设计可以将VFR峰值误差最小化,同时将VFD峰值误差抑制在规定的上限以下。借助简化的VFD表达式,可以将VFD峰误差约束近似线性化为线性约束,因此可以通过LP方法解决minimax设计。我们将使用一个说明性示例来验证简化的VFD表达式与真实表达式几乎相同,并且所提出的基于LP的两步极小极大设计可以显着抑制VFD峰值误差。

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