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Using the multi-bit feature of memristors for register files in signed-digit arithmetic units

机译:使用忆阻器的多位功能以有符号数的算术单位存储寄存器文件

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摘要

One of the outstanding features of memristors is their principle possibility to store more than one binary value in a single memory cell. Due to their further benefits of non-volatility, fast access times, low energy consumption, compactness and compatibility with CMOS logic, memristors are excellent devices for storing register values nearby arithmetic units. In particular, the capability to store multi-bit values allows one to realise procedures for high-speed arithmetic circuits, which are not based on usual binary but on ternary values. Arithmetic units based on three-state number representation allow carrying out an addition in two steps, i.e., in O(1), independent of the operands word length n. They have been well-known in literature for a long time but have not been brought into practice because of the lack of appropriate devices to store more than two states in one elementary register or main memory cell. The disadvantage of this number representation is that a corresponding arithmetic unit would require a doubling of the memory capacity. Using memristors for the registers can avoid this drawback. Therefore, this paper presents a conceptual solution for a three-state adder based on tri-stable memristive devices. The principal feasibility of such a unit is demonstrated by SPICE simulations and the performance increase is evaluated in comparison with a ripple-carry and a carry-look-ahead adder.
机译:忆阻器的突出特点之一是其在单个存储单元中存储多个二进制值的原则可能性。由于它们具有非易失性,快速访问时间,低能耗,紧凑性以及与CMOS逻辑的兼容性等优点,因此忆阻器是将寄存器值存储在算术单元附近的出色设备。特别地,存储多位值的能力允许人们实现用于高速算术电路的过程,该过程不是基于通常的二进制值而是基于三进制值。基于三态数表示的算术单元允许分两步执行加法,即在O(1)中执行独立于操作数字长n的加法运算。它们在文献中很久以来就已广为人知,但是由于缺乏在一个基本寄存器或主存储单元中存储适当的两个以上状态的适当设备而尚未投入实践。这种数字表示的缺点是相应的算术单元将需要两倍的存储容量。对寄存器使用忆阻器可以避免此缺点。因此,本文提出了一种基于三稳态忆阻器件的三态加法器的概念解决方案。这种单元的主要可行性通过SPICE仿真得到了证明,并且与纹波进位和超前进位加法器相比,可以评估性能的提高。

著录项

  • 来源
    《Semiconductor science and technology》 |2014年第10期|104008.1-104008.13|共13页
  • 作者

    Dietmar Fey;

  • 作者单位

    Friedrich-Alexander-Universitaet Erlangen-Nuernberg (FAU), Department Computer Science 3,Computer Architecture, Martensstr. 3, 91054 Erlangen, Germany;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    memristors multi-bit storage; signed-digit arithmetic; ternary computer;

    机译:忆阻器多位存储;有符号数字运算;三元计算机;

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