Chip level fault detection using leveling metrology

摘要

Defects in IC chips produced by semiconductor manufacturing processes strongly influence the yield of the manufacturing process, leading to higher cost of production of the chips. Such defects need to be identified by inspection tools for design modification, process modification, process monitoring, etc. Example apparatus for identifying defects are optical inspection tools and electron beam inspection / review tools. The optical tools typically have higher throughput while the tools also identify a large number of noise contributors potentially reducing the accuracy of hotspot detection. Thus the signal-to-noise ratio is a problem of such optical tools. On the other hand, the electron beam tools have better signal-to-noise ratio but have only very limited throughput. Therefore, the electron beam tools are not suitable for inspecting a large number of wafers or even an entire single chip/wafer.