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Architecture design methods for application domain-specific integrated computer systems

机译:用于特定应用领域的集成计算机系统的体系结构设计方法

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The role of the single computer inside application-specific integrated circuits is changing with the increasing capacity of semiconductor technology. The system functionality can be partitioned to a set of communicating application domain-specific computers instead of developing the most efficient general-purpose computers that fulfil all kinds of computing needs. The main design challenges are the complexity and diversity of application-domains and the complexity of platforms which can provide enough capacity for those applications. The architecture design methods presented in this thesis are targeted at application domain-specific computers that are implemented as integrated circuits. Backbone-platform-system design methodology separates the technology, platform design efficiency and application development problems from each other. It also provides a system design framework for the architecture design methods presented. The methods are based on complexity, mappability, and capacity-based quality estimations that are used as decision support and quality validation tools. Abstract models of both applications and architectures enable rapid estimations and adequate coverage in design space exploration. The methods have been applied to various case examples. Complexity-based estimation provided a systematic approach to the selection of an architecture template that takes into account the changes in technologies and design efficiency. Mappability-based processor-algorithm quality estimation enabled us to study more than 10,000 processor architectures for WLAN modem transceiver example. Capacity-based quality estimation was used in the performance evaluation of configurable multiprocessor architecture. In all cases the respective simulations using for example instruction-set simulators would have taken much longer and required advanced post-processing of results.
机译:随着半导体技术能力的提高,专用计算机内部的单台计算机的作用正在发生变化。可以将系统功能划分为一组通信的特定于应用程序域的计算机,而不用开发满足各种计算需求的最高效的通用计算机。主要的设计挑战是应用程序域的复杂性和多样性以及为这些应用程序提供足够容量的平台的复杂性。本文提出的体系结构设计方法针对于实现为集成电路的特定于应用领域的计算机。骨干平台系统设计方法将技术,平台设计效率和应用程序开发问题相互分离。它还为提出的体系结构设计方法提供了系统设计框架。这些方法基于复杂性,可映射性以及基于容量的质量估计,这些估计被用作决策支持和质量验证工具。应用程序和体系结构的抽象模型都可以在设计空间探索中进行快速估计和足够的覆盖。该方法已应用于各种案例。基于复杂度的估计为系统架构模板的选择提供了一种系统的方法,该方法考虑了技术和设计效率的变化。基于可映射性的处理器算法质量评估使我们能够为WLAN调制解调器收发器示例研究10,000多种处理器架构。基于容量的质量评估用于可配置多处理器体系结构的性能评估。在所有情况下,使用例如指令集仿真器的相应仿真将花费更长的时间,并且需要对结果进行高级后处理。

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