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首页> 外文期刊>Proceedings of the IEEE >Parallel VSIPL++: An Open Standard Software Library for High-Performance parallel Signal Processing
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Parallel VSIPL++: An Open Standard Software Library for High-Performance parallel Signal Processing

机译:并行VSIPL ++:用于高性能并行信号处理的开放标准软件库

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摘要

Real-time signal processing consumes the majority of the world's computing power. Increasingly, programmable parallel processors are used to address a wide variety of signal processing applications (e.g., scientific, video, wireless, medical, communication, encoding, radar, sonar, and imaging). In programmable systems, the major challenge is no longer hardware but software. Specifically, the key technical hurdle lies in allowing the user to write programs at high level, while still achieving performance and preserving the portability of the code across parallel computing hardware platforms. The Parallel Vector, Signal, and Image Processing Library (Parallel VSIPL++) addresses this hurdle by providing high-level C+ + array constructs, a simple mechanism for mapping data and functions onto parallel hardware, and a community-defined portable interface. This paper presents an overview of the Parallel VSIPL+ + standard as well as a deeper description of the technical foundations and expected performance of the library. Parallel VSIPL+ + supports adaptive optimization at many levels. The C++ arrays are designed to support automatic hardware specialization by the compiler. The computation objects (e.g., fast Fourier transforms) are built with explicit setup and run stages to allow for runtime optimization. Parallel arrays and functions in Parallel VSIPL+ + also support explicit setup and run stages, which are used to accelerate communication operations. The parallel mapping mechanism provides an external interface that allows optimal mappings to be generated offline and read into the system at runtime. Finally, the standard has been developed in collaboration with high performance embedded computing vendors and is compatible with their proprietary approaches to achieving performance.
机译:实时信号处理消耗了世界上大多数的计算能力。可编程并行处理器越来越多地用于处理多种信号处理应用(例如,科学,视频,无线,医疗,通信,编码,雷达,声纳和成像)。在可编程系统中,主要挑战不再是硬件,而是软件。具体而言,关键的技术障碍在于允许用户以较高的水平编写程序,同时仍要实现性能并保持代码在并行计算硬件平台之间的可移植性。并行矢量,信号和图像处理库(Parallel VSIPL ++)通过提供高级C ++数组构造,将数据和功能映射到并行硬件上的简单机制以及社区定义的可移植接口,解决了这一难题。本文概述了Parallel VSIPL ++标准,并对库的技术基础和预期性能进行了更深入的描述。并行VSIPL ++支持许多级别的自适应优化。 C ++数组旨在支持编译器自动进行硬件专业化。计算对象(例如快速傅立叶变换)是通过显式设置和运行阶段构建的,以允许运行时优化。并行VSIPL ++中的并行阵列和函数还支持显式的设置和运行阶段,用于加速通信操作。并行映射机制提供了一个外部接口,该接口允许最佳映射离线生成并在运行时读入系统。最后,该标准是与高性能嵌入式计算供应商合作开发的,并且与他们实现性能的专有方法兼容。

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