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A Dynamically Reconfigurable Parallel Processing Framework with Application to High-Performance Video Processing.

机译:动态可重配置的并行处理框架,应用于高性能视频处理。

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摘要

Digital video processing demands have and will continue to grow at unprecedented rates. Growth comes from ever increasing volume of data, demand for higher resolution, higher frame rates, and the need for high capacity communications. Moreover, economic realities force continued reductions in size, weight and power requirements. The ever-changing needs and complexities associated with effective video processing systems leads to the consideration of dynamically reconfigurable systems.;The goal of this dissertation research was to develop and demonstrate the viability of integrated parallel processing system that effectively and efficiently apply pre-optimized hardware cores for processing video streamed data. Digital video is decomposed into packets which are then distributed over a group of parallel video processing cores. Real time processing requires an effective task scheduler that distributes video packets efficiently to any of the reconfigurable distributed processing nodes across the framework, with the nodes running on FPGA reconfigurable logic in an inherently "Virtual" mode.;The developed framework, coupled with the use of hardware techniques for dynamic processing optimization achieves an optimal cost/power/performance realization for video processing applications. The system is evaluated by testing processor utilization relative to I/O bandwidth and algorithm latency using a separable 2-D FIR filtering system, and a dynamic pixel processor. For these applications, the system can achieve performance of hundreds of 640x480 video frames per second across an eight lane Gen I PCIe bus. Overall, optimal performance is achieved in the sense that video data is processed at the maximum possible rate that can be streamed through the processing cores. This performance, coupled with inherent ability to dynamically add new algorithms to the described dynamically reconfigurable distributed processing framework, creates new opportunities for realizable and economic hardware virtualization.
机译:数字视频处理需求已经并且将以前所未有的速度增长。增长来自不断增长的数据量,对更高分辨率,更高帧速率的需求以及对大容量通信的需求。此外,经济现实迫使尺寸,重量和功率要求不断降低。与有效的视频处理系统相关的不断变化的需求和复杂性导致了对动态可重配置系统的考虑。本论文的研究目标是开发和证明有效地,有效地应用预优化硬件的集成并行处理系统的可行性。处理视频流数据的核心。数字视频被分解为数据包,然后分布在一组并行视频处理核心上。实时处理需要一个有效的任务调度程序,该任务调度程序可以有效地将视频数据包分发到整个框架中的任何可重新配置的分布式处理节点,而这些节点以固有的“虚拟”模式在FPGA可重新配置的逻辑上运行。用于动态处理优化的硬件技术的组合实现了视频处理应用的最佳成本/功率/性能实现。通过使用可分离的2-D FIR滤波系统和动态像素处理器测试处理器相对于I / O带宽和算法延迟的利用率来评估系统。对于这些应用,该系统可通过八通道Gen I PCIe总线实现每秒数百个640x480视频帧的性能。总体而言,就视频数据以可以通过处理核心流式传输的最大可能速率进行处理的意义而言,可以实现最佳性能。这种性能,再加上向所述动态可重新配置的分布式处理框架中动态添加新算法的固有能力,为可实现且经济的硬件虚拟化创造了新机会。

著录项

  • 作者

    Hoffman, John Colby.;

  • 作者单位

    The University of New Mexico.;

  • 授予单位 The University of New Mexico.;
  • 学科 Engineering Computer.;Computer Science.;Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2013
  • 页码 139 p.
  • 总页数 139
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

  • 入库时间 2022-08-17 11:41:42

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