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A Designer's SURVIVAL GUIDE to High-Speed Serial Links

机译:设计师的高速串行链接生存指南

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摘要

At the dawn of the personal computer era in the early 1980's, clock frequencies were about 20 MHz and no one cared about signal integrity. Interconnects were transparent. The physical design of systems was about getting the connectivity right, about fitting all the components on the board and about managing the temperature verses fan noise. Then came the high-performance era of the 1990s, when clock frequen- cies increased to 200 MHz and above. Signal integrity became the new mantra. If you did not design the product for signal integrity, the product might not work. The physical design had to take into account controlled impedance interconnects and a linear topology, a termination strategy, minimized return path inductance for low ground bounce, and a low impedance power distribution network.
机译:在1980年代初期的个人计算机时代来临之际,时钟频率约为20 MHz,没有人关心信号的完整性。互连是透明的。系统的物理设计是为了确保正确的连接性,安装板上的所有组件以及管理温度和风扇噪声。然后是1990年代的高性能时代,当时时钟频率增加到200 MHz或更高。信号完整性成为新的口头禅。如果您并非出于信号完整性而设计产品,则该产品可能无法正常工作。物理设计必须考虑到受控阻抗互连和线性拓扑,端接策略,用于低接地反弹的最小返回路径电感以及低阻抗配电网络。

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