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Improving Circuit Design Using IC Packoge/PCB CO-DESIGN Techniques

机译:使用IC Packoge / PCB CO-DESIGN技术改善电路设计

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摘要

The approach to IC chip packaging design has remained fundamentally unchanged since the 1970s. The chip design team lays out the silicon die and decides what type of IC package to use and how to assign the pinouts. While efforts continue to make co-design of electronic assemblies a reality, no clear communication channel presently exists between the chip and PCB design teams. IC packages are, as the saying goes, simply "tossed over-the-wall" to board designers who are left to deal with whatever comes their way. This is a condition that might well be called "Chip , Packaging 1.0" (FIGURE 1). Since the IC package pinouts are documented in the chipmaker's datasheet, the board designer has no ability to change any aspect of the IC package or to re-map the pinout when necessary. As a result, the board designer has his shoelaces tied when he enters the race to design his product.
机译:自1970年代以来,用于IC芯片封装设计的方法从根本上保持不变。芯片设计团队对硅芯片进行布局,并决定使用哪种类型的IC封装以及如何分配引脚。尽管继续努力使电子组件的协同设计成为现实,但芯片与PCB设计团队之间目前尚无清晰的沟通渠道。俗话说,IC封装只是简单地“扔给了墙上的板子”,让剩下的板子设计师去处理他们遇到的任何问题。这种情况很可能称为“芯片,包装1.0”(图1)。由于IC封装的引脚排列已记录在芯片制造商的数据表中,因此电路板设计人员无权更改IC封装的任何方面或在必要时重新映射引脚排列。结果,电路板设计师在参加比赛以设计产品时系上了鞋带。

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