POWER INTEGRITY: CONTROLLING THE NOISE

摘要

Just as the board design community is becoming familiar with signal integrity, along comes the next hot topic - power integrity. The objective of board-level power integrity (PI) is to assure adequate current is delivered to all mounted devices within a tight voltage margin, as DC power requirements and AC switching activity change dynamically. PI challenges are of growing concern because of several parallel trends. Total power and current requirements are creeping upward, while voltage levels are dropping. With lower voltage comes lower power delivery network (PDN) and signal noise margins. Switching speeds are getting faster and high-speed serial and parallel interconnects are becoming more pervasive.