Automating The Ddrx Interface Verification Process

摘要

If you're a digital designer, there is a high likelihood that you have used Double Data Rate (DDR/DDR2/DDR3) memories in your designs - they are cheap and fast. Unfortunately, you've also probably discovered that verifying the razor-thin timing margins of these interfaces is very complex. With DDR2 pushing 1066 MT/s and DDR3 scheduled for 1600 MT/s, we face the demands of picosecond resolution, including "derating" adjustments to measured delay numbers based on the shape of the receiver waveforms. This is important stuff!rnThis kind of problem begs for a computerized solution. Don't get me wrong, to an experienced engineer, no single measurement is too complicated; rather, with DDRx, it's the shear number of possibilities to consider that makes complete manual verification virtually impossible. Fortunately, tools can be built to automate this tedious process and make it possible for any system designer to confidently and efficiently verify DDRx interfaces before committing to PCB prototypes.