Design and implementation of a compact frequency synchronisation control circuit using enable input for DC-DC converter

摘要

This study presents a compact frequency synchronisation control circuit using enable input for a DC-DC converter. The circuit extracts both enable signal and external synchronous clock from EN pin, which eases the system design and reduces the cost. The external clock can be recognised by setting a synchronous frequency range and replace the internal oscillator clock to synchronise the switching frequency directly without using a phase-locked loop. The proposed circuit has been implemented in a 0.6 mm complementary metal oxide semiconductor (CDMOS) process high-voltage buck DC-DC converter. The test results indicate that both enable and external synchronisation function can be realised by control of EN pin. Better performance has been achieved.