Cascaded multilevel inverter using series connection of novel capacitor-based units with minimum switch count

摘要

This paper presents a new family of cascaded multilevel inverters (CMLIs) which can generate a considerable number of output voltage levels with minimum number of required accompanying switching devices. Conceptually, each stage of proposed CMLI is composed of using a novel capacitor-based unit including two floating capacitors, one embedded dc voltage source and three power switches. In this case, the balanced voltage of integrated capacitors can be precisely provided as self-voltage balancing without using any auxiliary circuits, close loop systems and intricate modulation techniques. In addition, to reach different number of output voltage levels, four different algorithms pertaining to the symmetrical, binary asymmetrical, trinary asymmetrical and also hybrid patterns for determining the magnitude of isolated dc voltage sources are presented. Hereby, proposed hybrid structure is capable of working under mixed switching frequency without aiming the conventional full H-Bridge cell. Therefore, a high quality of output waveforms with reduced switching devices as well as power loss dissipation can be alternatively achieved. To confirm the validity of proposed CMLI, a complete comparison with several recently presented topologies besides several simulation and experimental results based on trinary asymmetrical and hybrid evolved structures will be also given.