High impedance discrete delay-line readout circuit for silicon strio detector

摘要

A prototype 16-tap high impedance discrete delay-line readout circuit has been designed and fabricated for Si-strip detectors suitable for nuclear physics experiments involving moderate count rate applications. The delay-line offers a delay of ～30 ns per tap with very good linearity. The energy resolution for α-particles from ~(241)Am- ~(239)Pu source is found to be satisfactory, when 16 strips are connected through the above readout circuit of a 32-strip Si-strip detector having a dead layer of 5 urn. This readout system is very useful where a large number of detectors are integrated in a compact space and accommodating their readout electronics is a cumbersome task.