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机译:基于通用的FPGA硬件架构,用于递归最低均值P-Power极限机器
Xi An Jiao Tong Univ State Key Lab Strength & Vibrat Mech Struct Shaanxi Key Lab Environm & Control Flight Vehicle Sch Aerosp Xian 710049 Shaanxi Peoples R China;
Xi An Jiao Tong Univ Sch Elect & Informat Engn Inst Control Engn Xian 710049 Shaanxi Peoples R China;
Xi An Jiao Tong Univ State Key Lab Strength & Vibrat Mech Struct Shaanxi Key Lab Environm & Control Flight Vehicle Sch Aerosp Xian 710049 Shaanxi Peoples R China;
Xi An Jiao Tong Univ Sch Elect & Informat Engn Inst Artificial Intelligence & Robot Xian 710049 Shaanxi Peoples R China;
Field-programmable gate array (FPGA); On-chip machine learning; Generic architecture; Recursive least mean p-power extreme learning machine (RLMP-ELM);
机译:递归最少平均p-power极限学习机
机译:基于FPGA的内核模糊c均值算法在线学习硬件架构
机译:基于FPGA的内核模糊c均值算法在线学习硬件架构
机译:最小平均p功率极限学习机,用于避免移动机器人的障碍
机译:基于FPGA的硬件加速器,用于机器学习的K近邻分类
机译:使用递归特征消除和分层极限学习机对ADHD亚型进行鉴别诊断的多类分类:结构MRI研究
机译:递归虚拟机的硬件体系结构