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New designs of fault-tolerant adders in quantum-dot cellular automata

机译:量子点细胞自动机中容错加法器的新设计

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摘要

Quantum-dot cellular automata (QCA) technology has attracted attention as one of the best forms of alternative Nanoscale CMOS technology. It has facilitated the designing of digital circuits with high density and speed. One of the important issues in QCA technology is designing fault-tolerant digital circuits. QCA-based circuits frequently suffer from fabrication and unstable faults: these make them unreliable and susceptible to breakdown. In this paper, two new fault-tolerant 3-input majority gates have been proposed in QCA technology. The robustness of the proposed structures has been evaluated in terms of defects such as cell omission, deposition of extra cell and cell displacement defects. The simulations were performed using the QCA Designer 2.0.03 and QCAPro tools to measure performance and energy consumption. The obtained results indicate that the proposed structures benefit from higher fault-tolerant in comparison to previous designs. Moreover, we provided four new fault-tolerant full-adders and a multi-bit adder using the proposed structures and acceptable results are archived. (C) 2018 Elsevier B.V. All rights reserved.
机译:作为替代纳米级CMOS技术的最佳形式之一,量子点细胞自动机(QCA)技术已引起人们的关注。它促进了高密度和高速度的数字电路的设计。 QCA技术的重要问题之一是设计容错数字电路。基于QCA的电路经常遭受制造和不稳定故障的困扰:这些使它们不可靠并且容易击穿。本文在QCA技术中提出了两个新的容错3输入多数门。已经根据诸如电池遗漏,多余的电池沉积和电池位移缺陷之类的缺陷评估了所提出结构的鲁棒性。使用QCA Designer 2.0.03和QCAPro工具进行了仿真,以测量性能和能耗。获得的结果表明,与先前的设计相比,所提出的结构受益于更高的容错能力。此外,我们使用提出的结构提供了四个新的容错全加器和一个多位加法器,并存储了可接受的结果。 (C)2018 Elsevier B.V.保留所有权利。

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