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Architectural solution for second-order intermodulation intercept point improvement in direct down-conversion receivers

机译:直接下变频接收机中用于改善二阶互调截点的体系结构解决方案

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摘要

Second-order intermodulation is a great drawback in zero-intermediate frequency (IF) receivers. Many complex techniques for distortion cancelling have been proposed in the literature. In this study, the authors propose a simple architectural solution for second-order intermodulation intercept point (IIP2) improvement and also theoretically and experimentally demonstrate the high rejection level abilities. To determine its performance, a classical in-phase and quadrature (IQ) demodulator was also designed and used as a reference. In order to compare their non-linear behaviour in the presence of interfering signals, two types of zero-IF demodulators were tested in this work in terms of error vector magnitude and bit error rate. This study shows that by using the three-phase architecture it is possible to gain 20 dB in blocking effect rejection in comparison to the classical IQ architecture.
机译:在零中频(IF)接收机中,二阶互调是一个很大的缺点。在文献中已经提出了许多用于消除失真的复杂技术。在这项研究中,作者提出了一种用于改善二阶互调截点(IIP2)的简单体系结构解决方案,并且在理论上和实验上都证明了高抑制水平的能力。为了确定其性能,还设计了经典的同相和正交(IQ)解调器并将其用作参考。为了比较存在干扰信号时它们的非线性行为,在这项工作中对两种类型的零中频解调器进行了测试,分别涉及误差矢量幅度和误码率。这项研究表明,与传统的IQ架构相比,通过使用三相架构,可以在阻塞效应抑制方面获得20 dB的增益。

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