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首页> 外文期刊>IEEE microwave and wireless components letters >A 3-D Low Jitter and Skew Clock Distribution Network Scheme Using LTCC Package Level Interposer With a Planar Cavity Resonator
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A 3-D Low Jitter and Skew Clock Distribution Network Scheme Using LTCC Package Level Interposer With a Planar Cavity Resonator

机译:使用带有平面腔谐振器的LTCC封装级插入器的3D低抖动和偏斜时钟分配网络方案

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摘要

In this paper, we propose a new three-dimensional (3-D) clock distribution network (CDN) scheme using a low temperature co-fired ceramic (LTCC) package level interposer with a planar cavity resonator to achieve extremely low jitter and skew clock delivery even in severe power supply noise environments, especially for digital chips in 3-D stacked chip packages. It is based on a uniform-phase of the standing wave at the quarter-wavelength planar cavity resonator embedded inside the LTCC interposer. Substantial suppression of the timing jitter and skew was successfully demonstrated through a series of design, fabrication, and measurement processes of test devices and packages.
机译:在本文中,我们提出了一种新的三维(3-D)时钟分配网络(CDN)方案,该方案使用带有平面腔谐振器的低温共烧陶瓷(LTCC)封装级插入器来实现极低的抖动和偏斜时钟即使在严重的电源噪声环境下也可以实现交付,尤其是对于采用3D堆叠芯片封装的数字芯片。它基于嵌入LTCC插入器内部的四分之一波长平面腔谐振器中驻波的均匀相位。通过一系列测试设备和封装的设计,制造和测量过程,成功地证明了对时序抖动和偏斜的实质性抑制。

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