Design of Robust On-Chip Drain Modulators for Monolithic Pulsed Power Amplifiers

摘要

This letter presents detailed design information for a monolithic high-speed drain modulator fabricated in a high-voltage gallium arsenide (GaAs) process and integrated with a 50-W $S$ -band power amplifier. The pHEMT modulator architecture and design tradeoffs affecting circuit size, speed, and reliability are discussed. Electrical performance is validated in the fast time domain, with detected rise and fall times of 6 and 4 ns, respectively, and achievable RF pulse widths as narrow as 25 ns. A novel all-phase mismatch test is used to evaluate modulator peak current handling over a matrix of operating conditions varying duty cycle from 5 to 45% and temperature from ${-}$ 55 to ${+}$ 85$^{circ}$ C; peak currents of up to 9 A are induced at a supply voltage of 28 V, with no observed degradation in electrical performance. Thermal measurements taken using high-resolution Raman scattering thermometry in conjunction with infrared imaging confirm that maximum channel temperatures in the modulator subcircuit are within safe operating limits.