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SMART manufacturing through predictive FA

机译:通过预测性智能制造

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We use semiconductor Integrated Circuit (IC) chips in our day-to-day life. ICs are placed in electronic devices that have become integral part of human life. With the advancement in human's modus vivendi, there comes a requirement of fast-growing technology which can only be achieved by narrowing the gap between design and manufacturing communities. As the semiconductor industry has matured over the year with reduced technology nodes, with 3D (3-Dimensional) structures, there has been a constant emphasis on yield, quality and reliability of the ICs. The technology and process complexity of today's ICs demand testing to monitor yield, performance, and reliability be performed during the manufacturing process. Chipmakers are using various tools to avoid losses with respect to quality and cost of the chip. With great challenge to find defects on lower technology node, comes the need for more accurate and efficient way of inspection. Failure Analysis (FA) results in the conventional process are no longer relevant to designs on new technology nodes. The proposed method in the paper, the FA results are fed back to upstream manufacturing process for corrective action. In this environment, traditional FA activities are finding an expanded role: Predictive FA. Proposed paper is an effort to overcome the traditional FA scenario using Predictive FA. A subset of artificial intelligence (AI), machine learning (ML) comes in rescue for the same. Integrating the algorithms of ML with image processing and pattern search to find the unique patterns of defects by making the machine to build a library (training data) of all the defects observed during FA and use the learning on test data. It will generate ability to predict new defects after being trained with enough scenarios. One such learning type is reinforcement learning, the machine is exposed to an environment where it trains itself continually. It learns from experience and try to make accurate decisions. This learning loop from FA to the inline inspection tools aids to better analysis of defects at a prior stage and detect potential failures in chip.
机译:我们在日常生活中使用半导体集成电路(IC)芯片。 IC被放置在具有人类生命中不可或缺的一部分的电子设备中。随着人类Modus Vivendi的进步,需要快速增长的技术,只能通过缩小设计和制造社区之间的差距来实现。随着半导体行业在年内成熟,通过减少技术节点,具有3D(三维)结构,持续强调IC的产量,质量和可靠性。在制造过程中执行当今ICS需求测试的技术和过程复杂性,以监测产量,性能和可靠性。芯片制造商正在使用各种工具来避免对芯片的质量和成本的损失。在较低的技术节点上找到缺陷的挑战,需要更准确和有效的检查方式。故障分析(FA)导致传统过程不再与新技术节点的设计相关。本文提出的方法,FA结果被反馈到上游制造过程以进行纠正措施。在这种环境中,传统的FA活动正在寻找扩展的作用:预测性FA。拟议论文是一种努力克服使用预测法的传统FA情景。一种人工智能(AI)的子集,机器学习(ML)救援同样。将ML的算法与图像处理和图案搜索集成,通过使机器构建在FA期间观察到的所有缺陷的库(培训数据)来找到独特的缺陷模式,并在测试数据上使用学习。在有足够的场景训练后,它将产生预测新缺陷的能力。一种这样的学习类型是加强学习,机器暴露于它不断列车的环境。它从经验中学习并尝试做出准确的决定。该学习循环从FA到内联检查工具有助于更好地分析先前阶段的缺陷并检测芯片中的潜在故障。

著录项

  • 来源
    《Microelectronics & Reliability 》 |2020年第11期| 113822.1-113822.6| 共6页
  • 作者

    Oberai Ankush; Kamoji Rupa;

  • 作者单位

    Synopsys Inc Mountain View CA 92130 USA;

    Synopsys India Pvt Ltd Mumbai 400053 Maharashtra India;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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