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首页> 外文期刊>Microelectronics journal >Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array
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Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array

机译:与超声换能器阵列集成的3D IC技术中的随机闪存模数转换器的设计和分析

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摘要

This paper presents a stochastic flash analog-to-digital converter (ADC), implemented in a three-dimensional stacked technology. Due to vertical stacking, the 3D technology reduces the ADC footprint area, and a power consumption,benefit for the 3D ADC is demonstrated compared with the 2D design. An all digitally synthesized stochastic 3D ADC was implemented using 130 nm GlobalFoundries device technology and Tezzaron through-silicon-vias (TSV) technology. Different TSV insertion methods were used and compared. A 20% improvement in power consumption is observed in the 3D implementation compared with the 2D counterpart. Thanks to the vertical stacking dies, a 40% footprint reduction is achieved in the 3D implementation. Two different integration topologies for 3D ADC and an ultrasound transducer arrays are considered and compared. Either the circuit dies are facing up, resulting in a face-to-face bonding between the transducer arrays and the three dimensional integrated circuit (3D IC), or the 3D IC dies are facing down, resulting a face-to-back connection. The simulation results show that the 3D face-up integration suppresses the TSV coupling noise to the analog input by around 10 dB. (C) 2015 Elsevier Ltd. All rights reserved.
机译:本文介绍了一种采用三维堆叠技术实现的随机闪存模数转换器(ADC)。由于垂直堆叠,3D技术减少了ADC的占位面积,并且与2D设计相比,证明了3D ADC的功耗和益处。使用130 nm GlobalFoundries器件技术和Tezzaron硅通孔(TSV)技术实现了全数字合成的随机3D ADC。使用和比较了不同的TSV插入方法。与2D同行相比,在3D实施中观察到功耗降低了20%。由于采用了垂直堆叠模具,因此3D实施中的占位面积减少了40%。考虑并比较了3D ADC和超声换能器阵列的两种不同的集成拓扑。电路管芯朝上,导致换能器阵列与三维集成电路(3D IC)之间面对面接合,或者3D IC管芯朝下,导致面对面连接。仿真结果表明,3D面朝上集成可将TSV耦合至模拟输入的噪声抑制约10 dB。 (C)2015 Elsevier Ltd.保留所有权利。

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