机译:具有并行设计的高效分布式视频编码,可在基于CUDA的GPGPU上进行LDPCA解码
Department of Computer Science and Information Engineering, National Taiwan University, Taipei 10617, Taiwan, ROC;
Graduate Institute of Networking and Multimedia, National Taiwan University, Taipei 10617, Taiwan, ROC;
Department of Computer Science and Information Engineering, National Taiwan University, Taipei 10617, Taiwan, ROC,Graduate Institute of Networking and Multimedia, National Taiwan University, Taipei 10617, Taiwan, ROC;
distributed video coding (DVC); ladder step size request (LSSR); LDPC accumulate (LDPCA); general purpose graphics processing unit; (GPGPU); CUDA; wyner-ziv; slepian-wolf; accumulated parity check matrix;
机译:基于并行多核仿真器的多核H.264视频解码器的“最佳”系统级设计方法
机译:基于Markov决策过程的多核系统中切片并行视频解码器的节能在线调度
机译:并行处理分布式视频编码以减少解码时间
机译:CUDA上H264视频并行解码器中帧内预测的实现和优化
机译:在并行和分布式系统上基于MPEG-4的交互式视频编码。
机译:视频传感器网络中的分布式编码/解码复杂度
机译:基于马尔可夫决策过程的多核系统切片并行视频解码器的节能在线调度