Design, Implementation and Performance Evaluation of LVDS Transmitter

摘要

This paper presents design and implementation of LVDS transmitter in CMOS 0.18um, 3.3V process. It is compatible with Low voltage differential signaling (LVDS) standard. The transmitter is tested up to 1Gbps.The transmitter consumes 8 mA current at 1Gbps. The silicon area of the LVDS transmitter chip is 0.85 mm × 1.1 mm. The set-up for testing, and measured results has been presented here. The designed IC's performance has also been measured under radiation environment and summary of results has been presented. LVDS transmitter for cold spare functionality has also been discussed in latter part of paper.