A kind of low-power 16 Gbit/s CMOS 1:4 demultiplexer

摘要

A 10 Gbit/s 1:4 demultiplexed DEMUX) fabricated in 0. 18 mu m CMOS (complementary metal-oxide-semiconductor transistor) technology for optical-fiber-link is presented. The system is constructed in tree-type structure and it includes a high-speed 1 : 2 DEMUX, two low-speed 1 : 2 DEMUXs, a divider, and input and output buffers for data and clock. To improve the circuit performance and reduce the power consumption, a latch structure with a common-gate topology and a single clock phase is employed in the high-speed 1:2 DEMUX and the 5 GHz 1:2 on-chip frequency divider, while dynamic CMOS logic is adopted in the low-speed 1: 2 DEMUXs. Measured results at 10 Gbit/s by 2~(31) - 1 pseudo random bit sequences (PRBS) via on-wafer testing indicate that it can work well with a power dissipation of less than 100 m W at 1.8 V supply voltage. The die area of the DEMUX is 0. 65 mm X 0. 75 mm.