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首页> 外文期刊>Journal of Real-Time Image Processing >A multi-FPGA architecture-based real-time TFM ultrasound imaging
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A multi-FPGA architecture-based real-time TFM ultrasound imaging

机译:基于多FPGA架构的实时TFM超声成像

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摘要

Real-time imaging, using ultrasound techniques, is a complex task in non-destructive evaluation. In this context, fast and precise control systems require design of specialized parallel architectures. Total focusing method (TFM) for ultrasound imaging has many advantages in terms of flexibility and accuracy in comparison to traditional imaging techniques. However, one major drawback is the high number of data acquisitions and computing requirements for this imaging technique. Due to those constraints, the TFM algorithm was earlier classified in the field of post-processing tasks. This paper describes a multi-FPGA architecture for real-time TFM imaging using the full matrix capture (FMC). In the acquisition process, data are acquired using a phased array and processed with synthetic focusing techniques such as the TFM algorithm. The FMC-TFM architecture consists of a set of interconnected FPGAs integrated on an embedded system. Initially, this imaging system was dedicated to data acquisition using a phased array. The algorithm was reviewed and partitioned to parallelize processing tasks on FPGAs. The architecture was entirely described using VHDL language, synthesized and implemented on a V5FX70T Xilinx FPGA for the control and high-level processing tasks and four V5SX95T Xilinx FPGAs for the acquisition and low-level processing tasks. The designed architecture performs real-time FMC-TFM imaging with a good characterization of defects.
机译:使用超声技术进行实时成像是非破坏性评估中的一项复杂任务。在这种情况下,快速而精确的控制系统需要专门的并行架构设计。与传统成像技术相比,用于超声成像的全聚焦方法(TFM)在灵活性和准确性方面具有许多优势。然而,一个主要缺点是该成像技术的大量数据采集和计算需求。由于这些限制,TFM算法已在后处理任务领域中进行了较早的分类。本文介绍了使用全矩阵捕获(FMC)进行实时TFM成像的多FPGA体系结构。在采集过程中,使用相控阵采集数据并使用合成聚焦技术(例如TFM算法)进行处理。 FMC-TFM体系结构由集成在嵌入式系统上的一组互连的FPGA组成。最初,此成像系统专用于使用相控阵的数据采集。对算法进行了审查和划分,以并行处理FPGA上的处理任务。该架构完全使用VHDL语言描述,在用于控制和高级处理任务的V5FX70T Xilinx FPGA上进行了综合和实现,并在用于采集和低级处理任务的四个V5SX95T Xilinx FPGA上进行了综合和实现。设计的架构执行具有良好缺陷特征的实时FMC-TFM成像。

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