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Increasing signal amplitude in electrical impedance tomography of neural activity using a parallel resistor inductor capacitor (RLC) circuit

机译:使用并联电阻电感器(RLC)电路在神经活动的电阻抗断层扫描中增加信号幅度

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Objective. To increase the impedance signal amplitude produced during neural activity using a novel approach of implementing a parallel resistor inductor capacitor (RLC) circuit across the current source used in electrical impedance tomography (EIT) of peripheral nerve. Approach. The frequency response of the impedance signal was characterized in the range 4?18?kHz, then a frequency range with significant capacitive charge transfer was selected for experiment with the RLC circuit. Design of the RLC circuit was aided by in vitro impedance measurements on nerve and nerve cuff in the range 5 Hz to 50?kHz. Main results. The frequency response of the impedance signal across 4?18?kHz showed maximum amplitude at 6?8?kHz, and steady decline in amplitude between 8 and 18?kHz with???6 dB reduction at 14?kHz. The frequency range 17????1?kHz was selected for the RLC experiment. The RLC experiment was performed on four subjects using an RLC circuit designed to produce a resonant frequency of 17?kHz with a bandwidth of 3.6?kHz, and containing a 22 mH inductive element and a 3.45 nF capacitive element with??+0.8/???3.45 nF manual tuning range. With the RLC circuit connected, relative increases in the impedance signal (3? noise) of 44% (15%), 33% (30%), 37% (8.6%), and 16% (19%) were produced. Significance. The increase in impedance signal amplitude at high frequencies, generated by the novel implementation of a parallel RLC circuit across the drive current, improves spatial resolution by increasing the number of parallel drive currents which can be implemented in a frequency division multiplexed (FDM) EIT system, and aids the long term goal of a real-time FDM EIT system by reducing the need for ensemble averaging.
机译:目的。为了增加神经活动过程中产生的阻抗信号幅度,使用了一种新颖的方法,该方法在用于周围神经电阻层析成像(EIT)的电流源两端实现并联电阻电感器电容器(RLC)电路。方法。阻抗信号的频率响应的特征是在4?18?kHz范围内,然后选择具有显着电容电荷转移的频率范围用于RLC电路的实验。通过在5 Hz至50?kHz范围内对神经和神经套进行体外阻抗测量,可以辅助RLC电路的设计。主要结果。阻抗信号在4?18?kHz处的频率响应在6?8?kHz处显示出最大幅度,在8至18?kHz之间的幅度稳定下降,在14?kHz处减小了6 dB。 RLC实验选择的频率范围为17≤1≤kHz。 RLC实验是使用RLC电路对四个对象进行的,该电路设计为产生17?kHz的谐振频率,带宽为3.6?kHz,并包含22 mH的电感元件和3.45 nF的电容元件,Δε+ 0.8 /Ω。 3.45 nF手动调整范围。在连接了RLC电路的情况下,阻抗信号(3Ω噪声)相对增加了44%(15%),33%(30%),37%(8.6%)和16%(19%)。意义。通过跨驱动电流的并联RLC电路的新颖实现而产生的高频阻抗信号幅度的增加,通过增加可以在频分复用(FDM)EIT系统中实现的并联驱动电流的数量来提高空间分辨率。 ,并通过减少集成平均的需求来帮助实现实时FDM EIT系统的长期目标。

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