IMPLEMENTATION OF UART WITH SINGLE ERROR CORRECTION USING VERILOG

摘要

A Universal Asynchronous Receiver / Transmitter (UART) is responsible for performing the main task in serial communications with computers. This paper presents Implementation of UART with single error correction using verilog methodology..The design is implemented in spartan 6 FPGA. In Communication the cost as well as complexity of the system increases due to simultaneous transmission of data bits on multiple wires so noise is produced in multiprocessor communication to achieve this we are using hamming code method