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Investigation of Dual Electrical Paths for Off-Chip Compliant Interconnects

机译:片外兼容互连的双电气路径研究

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This paper presents a study on a dual-path compliant interconnect design which attempts to improve the balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallel-path compliant interconnect structure will ensure the reliability of low-K dies. Implementation of this interconnect technology can be cost effective by using a wafer-level process and by eliminating the underfill process. Although an underfill is not required for thermomechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermomechanical reliability of a dual-path compliant interconnect.
机译:本文提出了一种对双路径兼容互连设计的研究,该设计试图通过使用多条电气路径代替一条电气路径来改善机械兼容性与电气寄生之间的平衡。兼容并行路径的互连结构的高兼容性将确保低K裸片的可靠性。通过使用晶圆级工艺并消除底部填充工艺,可以实现具有成本效益的互连技术。尽管出于热机械可靠性的目的并不需要底部填充物,但是可以使用底部填充物来减少互连的污染和氧化,并且还可以提供抵抗机械负载的额外刚性。因此,本文还研究了底部填充对双路径兼容互连的热机械可靠性的作用。

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  • 来源
    《Journal of Electronic Packaging》 |2013年第3期|031004.1-031004.7|共7页
  • 作者单位

    The George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0405;

    The George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0405;

    The George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0405;

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