A novel fin field effect transistor by extra insulator layer for high performance nanoscale applications

摘要

The present study reveals the novel structure of nanoscale silicon-on-insulator fin field effect transistor (FinFET) in which an extra insulator layer (EIL) is injected into the silicon active layer. The key idea in this work is to control the hot electron effect by reducing the critical electric field near the drain region. The high-k dielectric HfO2 is located between the silicon active layer and drain region under the gate oxides, where the average lateral electric field in the post-saturation region is high due to the function of the gate. The results of simulations reveal improvement in the hot electron reliability of EIL-FinFET in comparison to conventional FinFET (C-FinFET). In the proposed structure, the insulator region HfO2 decreases the electric field in the channel and drain regions, especially near the Fin corners. Therefore, reducing the hot carrier effect (HCE), brings about more efficiency in the operation of the proposed structure in comparison with that of C-FinFET. Furthermore, the performance improvement of the proposed structure has been investigated using three-dimensional and two-carrier device simulator. In addition to that, the HCE, off current, and gate current in both the devices are compared to demonstrate the high reliability of the EIL-FinFET in complementary metal oxide semiconductor devices.