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首页> 外文期刊>Journal of Applied Physics >Influence of single and double deposition temperatures on the interface quality of atomic layer deposited Al_2O_3 dielectric thin films on silicon
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Influence of single and double deposition temperatures on the interface quality of atomic layer deposited Al_2O_3 dielectric thin films on silicon

机译:单次和二次沉积温度对原子层沉积硅上Al_2O_3介电薄膜界面质量的影响

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An electrical characterization of Al_2O_3 based metal-insulator-semiconductor structures has been carried out by using capacitance-voltage, deep level transient spectroscopy, and conductance-transient (G-t) techniques. Dielectric films were atomic layer deposited (ALD) at temperatures ranging from 300 to 800℃ directly on silicon substrates and on an Al_2O_3 buffer layer that was grown in the same process by using 15 ALD cycles at 300℃. As for single growth temperatures, 300℃ leads to the lowest density of states distributed away from the interface to the insulator [disorder-induced gap states (DIGS)], but to the highest interfacial state density (D_(it)). However, by using 300/500℃ double growth temperatures it is possible to maintain low DIGS values and to improve the interface quality in terms of D_(it). The very first ALD cycles define the dielectric properties very near to the dielectric-semiconductor interface, and growing an upper layer at higher ALD temperature produces some annealing of interfacial states, thus improving the interface quality. Also, samples in which the only layer or the upper one was grown at the highest temperature (800℃) show the poorest results both in terms of D_(it) and DIGS, so using very high temperatures yield defective dielectric films.
机译:Al_2O_3基金属-绝缘体-半导体结构的电学表征已通过使用电容电压,深能级瞬变谱和电导瞬变(G-t)技术进行。在300至800℃的温度下,将介电膜直接沉积在硅衬底上并在300℃下通过15次ALD循环在同一过程中生长的Al_2O_3缓冲层上进行原子层沉积(ALD)。对于单一的生长温度,300℃导致从界面到绝缘子的状态分布的状态密度最低(无序诱导间隙状态(DIGS)),但界面状态密度最大(D_(it))。但是,通过使用300/500℃的双倍生长温度,可以保持较低的DIGS值并改善D_(it)的界面质量。最初的ALD循环定义了非常接近介电体-半导体界面的介电特性,在较高的ALD温度下生长上层会产生界面态的某些退火,从而提高了界面质量。同样,仅在最高温度(800℃)下生长的唯一一层或顶层的样品在D_it和DIGS方面均显示出最差的结果,因此使用非常高的温度会产生有缺陷的介电膜。

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