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首页> 外文期刊>Japanese Journal of Applied Physics. Part 1, Regular Papers, Brief Communications & Review Papers >High-κ Material Sidewall with Source/Drain-to-Gate Non-overlapped Structure for Low Standby Power Applications
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High-κ Material Sidewall with Source/Drain-to-Gate Non-overlapped Structure for Low Standby Power Applications

机译:高κ材料侧壁具有源极/漏极至栅极非重叠结构,适用于低待机功率应用

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摘要

In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current I_(off) significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current I_(on) is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current I_(on) effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.
机译:在本文中,详细研究了具有源极/漏极扩展位移和高κ偏移间隔物的全耗尽型绝缘体上硅(SOI)器件。计算结果表明,通过利用源/漏扩展移位区中的额外电子势垒高度来减少待机功耗,源/漏扩展移位可以显着降低截止态泄漏电流I_(off)。但是,导通状态的驱动电流I_(on)也被同时牺牲。为了克服这个缺点,使用高κ偏移垫片通过增强垂直边缘电场来有效地增加导通状态驱动电流I_(on),从而增加沟道电压降并减小串联电阻。

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