Impact of random discrete dopant in extension induced fluctuation in gate-source/drain underlap FinFET

摘要

In this work, three dimensional technology computer-aided design (TCAD) simulations are performed to investigate the impact of random discrete dopant (RDD) including extension induced fluctuation in 14 nm silicon-on-insulator (SOI) gate-source/drain (G-S/D) underlap fin field effect transistor (FinFET). To fully understand the RDD impact in extension, RDD effect is evaluated in channel and extension separately and together. The statistical variability of FinFET performance parameters including threshold voltage (V_(th)), subthreshold slope (SS), drain induced barrier lowering (DIBL), drive current (I_(on)), and leakage current (I_(off)) are analyzed. The results indicate that RDD in extension can lead to substantial variability, especially for SS, DIBL, and I_(on) and should be taken into account together with that in channel to get an accurate estimation on RDF. Meanwhile, higher doping concentration of extension region is suggested from the perspective of overall variability control.