机译:使用兼容CMOS的接触材料在独立式GaN晶片上的1.2 kV GaN肖特基势垒二极管
Shenzhen Univ, Coll Mat Sci & Engn, Shenzhen Key Lab Special Funct Mat, Nanshan Dist Key Lab Biopolymer & Safety Evaluat, Shenzhen 518060, Peoples R China;
Shanghai Univ, Dept Phys, Shanghai 200444, Peoples R China|Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, State Key Lab Funct Mat Informat, Shanghai 200050, Peoples R China;
Shenzhen Univ, Coll Mat Sci & Engn, Shenzhen Key Lab Special Funct Mat, Nanshan Dist Key Lab Biopolymer & Safety Evaluat, Shenzhen 518060, Peoples R China;
Chinese Acad Sci, Suzhou Inst Nanotech & Nanobion SINANO, Suzhou 215123, Peoples R China;
Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, State Key Lab Funct Mat Informat, Shanghai 200050, Peoples R China;
Chinese Acad Sci, Suzhou Inst Nanotech & Nanobion SINANO, Suzhou 215123, Peoples R China;
Shenzhen Univ, Coll Mat Sci & Engn, Shenzhen Key Lab Special Funct Mat, Nanshan Dist Key Lab Biopolymer & Safety Evaluat, Shenzhen 518060, Peoples R China|Univ Tokushima, Inst Technol & Sci, Tokushima 7708501, Japan;
机译:GaN肖特基障碍二极管在独立的GaN晶圆上
机译:自由GaN衬底上垂直GaN肖特基势垒二极管和p-n二极管正向电流/电压特性的数值分析
机译:用MG补偿漂移层的独立GaN肖特基屏障二极管改进垂直GaN肖特基屏障二极管的击穿电压
机译:1.2 KV AlGaN / GaN肖特基势垒二极管在SiO2钝化层上采用+离子注入
机译:用于AlGaN / GaN和InAlN / GaN二极管以及在硅(111)衬底上生长的高迁移率晶体管的CMOS兼容氧化钌肖特基接触的研究。
机译:GaN基纳米级肖特基势垒二极管中的势垒不均匀性限制了电流和1 / f噪声的传输
机译:1.9-KV AlGaN / GaN横向肖特基屏障二极管在硅上