Load Value Prediction via Two-hop Reference Address Renaming

摘要

In this paper, we present an alternative implementation of load value prediction. Load values are proposed to be predicted using store information. A pair of a load and a store instructions referring a same memory location is linked and the stored value is forwarded to the load instruction. For date forwarding, store-indexed value table (SIVT) and load-indexed store table (LIST) are proposed. By indexing the LIST by a load instruction address, the load instruction address is translated to a store instruction address, and the SIVT indexed by the translated address supplies a data value. In order to link the store and load instructions, data-indexed store table (DIST) is proposed. nom the experimental evaluation, we have found that the instruction level parallelism is increased by 3.4/100 on average with a maximum of 9.4/100 when this load value prediction mechanism is implemented.