A Multiprocessor Architecture SKY that Exploits Thread-Level Parallelism in Non-Numerical Applications

摘要

Current microprocessors have improved performance by exploiting more amount of instruction-level parallelism (ILP) from a program through superscalar architectures. This approach, however, is reaching its limit because of the limited ILP available to superscalar processors and the growth of their hardware complexity. Another approach that solves those problems is to exploit thread-level parallelism (TLP) in addition to ILP.