Design And Implementation of Pulse-Based Low Power 5-Bit Flash Adc In Time-Domain

摘要

Analog-to-Digital Converter (ADC) is implemented using the concept of time-based ADCs (T-ADCs) where the voltage-to-time eonveter (FTC) and time-to-digital converter (TDC) blocks are used. The input analog signal is transformed into timing stamps depending on the level trigger of input voltage in VTC block. Then time is transformed into digital output by using the TDC block. The main advantage of T-ADC is, it resists the use of pre-amplifier stages, operates at low supply voltage, and it supports both low-speed and high-speed applications. Here, a new concept of digital ladder is been proposed where, only digital circuits are used for implementing of complete reference ladder and further a Flash ADC(FADC) is proposed and implemented using sample-and-ramp, comparator and digital circuits in CMOS I30nm technology.