MOSFET-only pipelined analogue-to-digital converters: non-linearity compensation by digital calibration

摘要

In this study, a 12-bit 65MS/s MOSFET-only pipelined analogue-to-digital converter (ADC) is successfully designed and implemented in 0.18 μm standard digital complementary metal-oxide-semiconductor (CMOS) technology. In the proposed ADC, constant capacitors of the analogue pipeline stages are replaced with anti-parallel depletion-mode metal-oxide-semiconductor (MOS) devices and their non-linearity is modelled and calibrated digitally. Simulations show that the proposed digital calibration algorithm improves the ADC signal-to-noise plus distortion ratio and spurious-free dynamic range from 43 dB and 44 dB to 70 dB and 78 dB, respectively.