Novel Work on Low Power Multiplexer for High Speed Switching Devices Using Sleep Transistor Techniques

摘要

In nanometer advances, static power utilization is a noteworthy concern. In addition to innovation in downsizing and higher working rates of CMOS VLSI circuits, the leakage power is being upgraded. As the geometries of the procedure decrease, increases in thickness of the device as well as the voltage of the threshold just as the thickness of the oxide decreases to keep pace with execution. Different strategies for controlling sub threshold leakage reduction. Furthermore, another method for small and quick leakage is also suggested here. Because of the elevated transistor density, low threshold and ultrathin dielectric, the leakage control dissemination increases rapidly as the innovation scales down to deep submicron level. The new suggested circuit approach includes sleepy Multiplexer and associate Transistors to reduce leakage current with an appropriate W/L ratio. The suggested scheme provides fast execution as it incorporates NMOS Transistor into the framework with greater electron mobility. Intemperate by and substantial execution highlight is inserted into small-scale devices in nanotechnology development. In this paper where conventional Multiplexer consume 170μw in 180nm technology as such at 45nm technology it's consume 27μw in active mode. In sleepy multiplexer both active as well as static mode the power dissipation reduces 12 times, at 180nm technology sleepy Multiplexer consume power 80μw in active mode and in static mode its consumes 24μw power, as well as at 45nm technology Sleepy Multiplexer consume 6.6μw power in active mode and in static mode its consume 2.5μw.