机译:用于图像传感器的CMOS 65nm APseudo 12位8,33MS / s电荷重新分配逐次逼近ADC
Sidi Mohammed Ben Abdellah University, Faculty of Sciences and Technology, Signals, Systems and Components Laboratory, P.O. Box 2202, 30000 Fez , MOROCCO, STMicroelectronics, IMAGING Division CMG Rabat, MOROCCO;
Sidi Mohammed Ben Abdellah University, Faculty of Sciences and Technology, Signals, Systems and Components Laboratory, P.O. Box 2202, 30000 Fez , MOROCCO;
Sidi Mohammed Ben Abdellah University, Taza Polydisciplinary Faculty, LIMAO Lab, Route d'Oujda, P.O. Box 1223 Taza, MOROCCO;
STMicroelectronics, IMAGING Division Grenoble- FRANCE;
CMOS image sensors; column-level ADC; successive; approximations ADC; differential charge redistribution DAC; fringe capacitor;
机译:用于图像传感器的CMOS 65nm伪12位8,33MS / s电荷重新分配逐次逼近ADC
机译:低噪声CMOS图像传感器基于12位SAR ADC的快速相关多重采样技术和数字校准
机译:具有列并行12位SAR ADC的低噪声CMOS图像传感器的快速多重采样方法
机译:一个12位,2.5位/周期,1 MS / s两级循环ADC,用于高速CMOS图像传感器
机译:采用65nm CMOS技术的基于时间的低功耗,低失调5位1 Gs / S闪存ADC设计
机译:具有列并行12位SAR ADC的低噪声CMOS图像传感器的快速多重采样方法
机译:一种具有列并行12位saR aDC的低噪声CmOs图像传感器快速多采样方法