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0.5-V fractional-order companding filters

机译:0.5V分数阶压扩滤波器

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摘要

Novel configurations of fractional-order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh-domain and log-domain integrators are presented. Because of the employment of metal-oxide-semiconductor (MOS) transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra-low-voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional-order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180-nm complementary MOS (CMOS) process. Copyright (c) 2014 John Wiley & Sons, Ltd.
机译:本文介绍了通过使用压扩滤波概念实现的分数阶滤波器拓扑的新配置。第一步,以系统的算法方式介绍了设计过程,而在下一步中,介绍了sinh域和对数域积分器的基本构造块。由于采用了在亚阈值区域内工作的金属氧化物半导体(MOS)晶体管,因此派生的滤波器结构提供了在超低压环境下工作的能力。另外,由于提供了无电阻器实现,因此可以通过适当的偏置电流源选择滤波器的阶数,从而可以对所提出的拓扑进行重新配置。使用Cadence软件的模拟设计环境和台湾半导体制造公司(TSMC)180纳米互补MOS(CMOS)工艺提供的MOS晶体管参数,通过仿真和比较结果评估了派生的分数阶滤波器的性能。版权所有(c)2014 John Wiley&Sons,Ltd.

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