A low-power CMOS transimpedance amplifier in 90-nm technology for 5-Gbps optical communication applications

摘要

In this paper, a modified Regulated Cascode (RGC)-based, low-power, transimpedance amplifier (TIA) is proposed followed by a closed-loop gain stage beside an added level shifter circuit to the booster of a conventional RGC circuit to set the proper biasing conditions for the transistors in the proposed TIA structure in 90-nm CMOS technology. Moreover, the added gain stage benefits from an active inductor which resonates with the output capacitance of the TIA circuit to extend the bandwidth while saves the occupied chip area in comparison with passive inductor schemes. In addition, the performance of the proposed TIA circuit is simulated in HSPICE using 90-nm CMOS technology parameters which show a transimpedance gain of 41 dB Omega, -3-dB frequency bandwidth of 3.7 GHz, input referred noise value of 834nA(rms), and the power consumption value of only 1.4 mW at 1-V supply.