FPGA IMPLEMENTATION OF RESISTIVE-FUSE NETWORKS FOR COARSE IMAGE-REGION SEGMENTATION

摘要

Image region segmentation is an important preprocessing for natural-scene image recognition. Most of the previously-proposed segmentation algorithms use the particular features in the target regions as keys for segmentation, such as eyes and a mouth in the human face. In this paper, a coarse region segmentation algorithm using a resistive-fuse network is proposed. The proposed algorithm uses average brightness of local area instead of using the particular features. In order to realize digital LSI implementation of the proposed algorithm, pixel-serial architecture with parallel neighboring-connection operation is proposed. On the basis of this architecture, the resistive-fuse network algorithm has been implemented in an FPGA. A PC system including the FPGA for coarse region segmentation has been constructed, in which real images of 64 x 64 pixels are successfully processed at real time.