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Flipped voltage follower based fourth order filter and its application to portable ECG acquisition system

机译:基于翻转电压跟随器的四阶滤波器及其在便携式心电图采集系统中的应用

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摘要

This paper presents the designing of a compact flipped voltage follower (FVF) based fourth order low-pass filter (LPF). The circuit is designed by cascading current-reuse P-FVF and N-FVF biquads operating in sub-threshold region. The circuit attains a cut-off frequency of 206.14 Hz designed for portable ECG acquisition system. The proposed circuit is simulated in 0.13 mu m CMOS technology in Cadence environment. The circuit occupies a chip area of 180.310 mu m x 552.390 mu m i.e. 0.0996 mm(2). LPF consumes 2.46 nW power with a supply voltage of 0.5 V. It provides a dynamic range of 65.17 dB with input referred noise of 22.214 mu Vrms, HD3 of 60.3 dB with 50 mVpp 50 Hz frequency. The circuit is compared with state of the art LPFs which provides the best figure of merit and shows enhanced performance in terms of noise, HD3 and dynamic range with lowest supply voltage and technology node.
机译:本文介绍了基于紧凑型翻转电压跟随器(FVF)的四阶低通滤波器(LPF)的设计。该电路是通过级联在亚阈值区域工作的电流重用P-FVF和N-FVF双二阶电路来设计的。该电路达到了为便携式ECG采集系统设计的206.14 Hz截止频率。在Cadence环境下,该电路采用0.13μmCMOS技术进行了仿真。该电路占用的芯片面积为180.310微米x 552.390微米,即0.0996毫米(2)。 LPF在0.5 V的电源电压下消耗2.46 nW的功率。动态范围为65.17 dB,输入参考噪声为22.214μVrms,HD3为60.3 dB(50 mVpp 50 Hz频率)。该电路与提供最佳性能指标的最新LPF进行了比较,并以最低的电源电压和技术节点在噪声,HD3和动态范围方面显示了增强的性能。

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