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首页> 外文期刊>Industry Applications, IEEE Transactions on >Design Considerations of Ultracapacitor Stack for Optimal Sizing of Energy Storage Systems in Contingency Applications
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Design Considerations of Ultracapacitor Stack for Optimal Sizing of Energy Storage Systems in Contingency Applications

机译:超超容量堆栈的设计考虑因素应用中的储存系统中的最佳尺寸

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摘要

Ultracapacitors (UCs) today are playing an increasing role in the energy storage systems (ESSs) of several power conversion applications. In this article, a design method for optimal sizing of a UC stack is proposed, which minimizes the overall cost of the ESS. The problem is cast with normalized cost parameters of the ESS subsystem, using which the discharge ratio of the stack is optimized for the given ESS specifications. An iterative design algorithm is proposed which systematically engineers the stack parameters of unit cell capacitance, the number of series cells and parallel strings along with the initial and final stack voltage levels that meet the specified ESS requirements while also supplying the equivalent series resistance (ESR) loss. The iterative sizing process also factors in the maximum power transfer constraint imposed by the ESR to guarantee stable operation of the cost-optimal design even as the stack voltage varies during discharge. The design considerations, optimization framework, ESR effects, and the proposed sizing algorithm are synthesized in a generalized formulation in order to capture the variations in cost and subsystem parameter values that typically vary based on scaling requirements as well as the UC and power converter technology. Experimental results on a 4 kWmin UC stack validate the proposed cost-optimal design algorithm and the ESR induced voltage collapse.
机译:UltraCapacitors(UCS)今天正在多个电源转换应用的能量存储系统(ESS)中发挥着越来越大的作用。在本文中,提出了一种用于UC堆栈的最佳施胶的设计方法,从而最大限度地减少了ESS的总成本。该问题采用ESS子系统的标准化成本参数投射,使用该堆栈的堆栈的放电比率针对给定ESS规范进行了优化。提出了一种迭代设计算法,其系统地设计了单位电池电容的堆叠参数,串联电池的数量和并联串以及符合指定ESS要求的初始和最终堆叠电压电平,同时还提供等效的串联电阻(ESR)失利。迭代大小化过程还通过ESR施加的最大功率传输约束,以保证成本最佳设计的稳定运行,即使堆叠电压在放电期间变化时也是如此。设计注意事项,优化框架,ESR效应和所提出的大小化算法在广义配方中合成,以捕获通常基于缩放要求以及UC和功率转换器技术的成本和子系统参数值的变化。 4 KWMIN UC堆栈上的实验结果验证了所提出的成本最优设计算法和ESR感应电压塌陷。

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