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Path-Classified Trace Cache for Improving Hit Ratio in Wide-Issue Processors

机译:路径分类的跟踪缓存,用于提高宽问题处理器的命中率

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摘要

In this paper, an instruction-cache scheme called Multi-Path Tracing is proposed to enhance the trace cache. Paths are classified to improve the trace cache hit ratio by reduc- ing the path conflict and basic blocks are joined to reduce the hardware cost needed to implement the trace cache. Simulation results for various SPEC integer benchmarks show that the pro- posed scheme increases the hit ratio by more than 25% and the effective fetch size by 10%.
机译:在本文中,提出了一种称为多路径跟踪的指令高速缓存方案以增强跟踪高速缓存。通过减少路径冲突来对路径进行分类以提高跟踪缓存命中率,并加入基本块以减少实现跟踪缓存所需的硬件成本。各种SPEC整数基准的仿真结果表明,所提出的方案将命中率提高了25%以上,有效读取大小提高了10%。

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