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Blocked United Algorithm for the All-Pairs Shortest Paths Problem on Hybrid CPU-GPU Systems

机译:混合CPU-GPU系统上全对最短路径问题的块联合算法

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This paper presents a blocked united algorithm for the all-pairs shortest paths (APSP) problem. This algorithm simultaneously computes both the shortest-path distance matrix and the shortest-path construction matrix for a graph. It is designed for a high-speed APSP solution on hybrid CPU-GPU systems. In our implementation, two most compute intensive parts of the algorithm are performed on the GPU. The first part is to solve the APSP sub-problem for a block of sub-matrices, and the other part is a matrix-matrix "multiplication" for the APSP problem. Moreover, the amount of data communication between CPU (host) memory and GPU memory is reduced by reusing blocks once sent to the GPU. When a problem size (the number of vertices in a graph) is large enough compared to a block size, our implementation of the blocked algorithm requires CPU ≒ GPU exchanging of three blocks during a block computation on the GPU. We measured the performance of the algorithm implementation on two different CPU-GPU systems. A system containing an Intel Sandy Bridge CPU (Core i7 2600K) and an AMD Cayman GPU (Radeon HD 6970) achieves the performance up to 1.1 TFlop/s in a single precision.
机译:本文提出了一种针对所有对最短路径(APSP)问题的分块联合算法。该算法同时计算图形的最短路径距离矩阵和最短路径构造矩阵。它设计用于混合CPU-GPU系统上的高速APSP解决方案。在我们的实现中,算法的两个计算量最大的部分是在GPU上执行的。第一部分是解决子矩阵块的APSP子问题,另一部分是解决APSP问题的矩阵-矩阵“乘法”。此外,通过重新使用发送到GPU的块,减少了CPU(主机)内存和GPU内存之间的数据通信量。当问题的大小(图形中的顶点数量)与块大小相比足够大时,我们对分块算法的实现需要在GPU上进行块计算期间CPU≒GPU交换三个块。我们在两个不同的CPU-GPU系统上测量了算法实现的性能。包含Intel Sandy Bridge CPU(Core i7 2600K)和AMD Cayman GPU(Radeon HD 6970)的系统可以单精度实现高达1.1 TFlop / s的性能。

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