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Area and Delay Estimation in Hardware/Software Cosynthesis for Digital Signal Processor Cores

机译:数字信号处理器内核的硬件/软件综合中的面积和延迟估计

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摘要

Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for dig- ital signal processor cores. In hardware/software partitioning, area and delay estimation of a processor core plays an impor- tant role since the hardware/software partitioning process must determine which part of a processor core should be realized by hardware units and which part should be realized by a sequence of instructions based on execution time of an input application program and area of a synthesized processor core.
机译:硬件/软件分区是用于数字信号处理器内核的硬件/软件综合系统中的关键过程之一。在硬件/软件分区中,处理器内核的面积和延迟估计起着重要作用,因为硬件/软件分区过程必须确定处理器内核的哪一部分应由硬件单元实现,而哪一部分应由顺序实现。基于输入应用程序的执行时间和合成处理器内核的面积的指令的组合。

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