Track/Hold Circuit in GaAs HBT Process

摘要

This paper reports on the design and performance of a very fast Track/Hold (T/H) circuit with GaAs Het-erojunction Bipolar Transistor (HBT) to precede a 3GS/s 6 bit ADC. The T/H circuit employs a differential open-loop architecture for high-speed operation, and it consists of diode bridge switches, hold capacitors and output buffers. The differential structure as well as the output buffers suppress droop effects due to the small h_(F E) (≈20) of our HBT. Measured results show that the T/H circuit has better than 6 bit linearity within an input range of 1.0 V_(p-p) with power dissipation of 990 mW, and the bandwidth is 6 GHz in the track mode. The measured droop rate is 2.1 mVs, the feedthrough is -46 dB at 500 MHz and the hold pedestal is less than 10 mV. Also a 3GHz sampling operation of the T/H circuit was measured. The T/H circuit uses 43 HBTs, 24 Schottky barrier diodes and occupies a chip area of 1.4 x 1.75 mm~2. We also describe the design and performance of a variable gain amplifier with GaAs HBT to precede the T/H circuit as an input buffer and adjust its gain. These results support the possibility of meeting the requirements for a high-speed ADC system.