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首页> 外文期刊>IEICE Transactions on Electronics >Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators
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Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

机译:考虑开关晶体管电容的CMOS压控振荡器的相位噪声衰减分析

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In this paper we present a study on the design optimization of voltage-controlled oscillators. The phase noise of LC-type oscillators is basically limited by the quality factor of inductors. It has been experimentally shown that higher-Q inductors can be achieved at higher frequencies while the oscillation frequency is limited by parasitic capacitances. In this paper, the minimum transistor size and the degradation of the quality factor caused by a switched-capacitor array are analytically estimated, and the maximum oscillation frequency of VCOs is also derived from an equivalent circuit by considering parasitic capacitances. According to the analytical evaluation, the phase noise of a VCO using a 65 nm CMOS is 2dB better than that of a 180 nm CMOS.
机译:在本文中,我们对压控振荡器的设计优化进行了研究。 LC型振荡器的相位噪声基本上受电感器品质因数的限制。实验表明,在更高的频率下可以获得更高Q值的电感器,而振荡频率受寄生电容的限制。本文分析地估计了由开关电容器阵列引起的最小晶体管尺寸和品质因数的下降,并且考虑了寄生电容,还从等效电路中得出了VCO的最大振荡频率。根据分析评估,使用65 nm CMOS的VCO的相位噪声比180 nm CMOS的相位噪声好2dB。

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