机译:特定于芯片的专用网络的拓扑综合的群集生成和网络组件插入
Graduate School of Information Production and Systems, Waseda University, Kitakyushu-shi, 808-0135 Japan;
Graduate School of Information Production and Systems, Waseda University, Kitakyushu-shi, 808-0135 Japan;
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, USA;
Graduate School of Information Production and Systems, Waseda University, Kitakyushu-shi, 808-0135 Japan;
Department of Computer Science & Technology, Tsinghua University, Beijing, China;
Graduate School of Information Production and Systems, Waseda University, Kitakyushu-shi, 808-0135 Japan;
networks on chip (NoC); placement; synthesis; topology;
机译:专用芯片网络的容错拓扑生成方法
机译:片上网络设计的专用拓扑生成算法
机译:低功耗应用专用片上网络的拓扑生成和布局规划
机译:用于3D专用片上网络的网络组件插入方法
机译:多跳无线网络的应用特定于拓扑的独立路由。
机译:设计区域优化的特定于应用的片上网络架构同时提供硬QoS保证
机译:专用芯片网络的容错拓扑生成方法