机译:速率自适应系统的速率兼容非二进制LDPC码
Department of Electrical Engineering, Khon Kaen University, 123 Mitrapap Road Khon Kaen 40002;
Department of Communications and Integrated Systems, Graduate School of Science and Engineering, Tokyo Institute of Technology, 2-12-1, Ookayama, Meguro-ku, Tokyo, 152-8552, Japan;
Department of Electrical Engineering, Khon Kaen University, 123 Mitrapap Road Khon Kaen 40002;
Department of Communications and Integrated Systems, Graduate School of Science and Engineering, Tokyo Institute of Technology, 2-12-1, Ookayama, Meguro-ku, Tokyo, 152-8552, Japan;
rate compatible code; non-binary low-density parity-check code; higher modulation scheme; adaptive wireless system;
机译:速率兼容的非二进制LDPC卷积码的设计和性能
机译:速率兼容的非二进制LDPC卷积码的性能和构造
机译:速率兼容的非二进制LDPC卷积码的性能和构造
机译:速率兼容的非二进制LDPC码与乘法重复码连接
机译:通用串行级联网格编码调制和速率兼容的高速率LDPC码。
机译:具有速率自适应LDPC码的解码转发多中继网络的能量效率
机译:速率兼容非二进制LDpC卷积系统的设计与性能 代码